We prefer PCB First , FPGA late methodology. This save development times. During the period of PCB Layout, FPGA designer are doing thier HDL codings.
I have found we need a mix of both.
Some interfaces are FPGA-first
- Interfaces used on previous FPGA designs where we have VHDL/UCF already
- Interfaces generated by FPGA IP tools (e.g.memory interfaces from the Xilinx MIG)
Other interfaces are PCB first
- New interfaces where VHDL not yet available
A way of merging signal definitions from different sources would be useful.