2 Replies Latest reply on Jul 19, 2012 11:20 AM by weston_beal

How to use .ebd model to simulate the DDR3?

heoracle Jul 16, 2012 12:38 AM

Expert,

I used Micron's DDR3 IBIS model to simulate the clk signal.I found the .ebd modle which is given by the Micron don't have the location of the termination capacitance, CTT and the power up VDD.How can i add these in .ebd model?

5837MT16JTF25664HZ 1G6G1_ebd.zip 2.7 MB

1. Re: How to use .ebd model to simulate the DDR3?

d.harish Jul 16, 2012 5:29 AM (in response to heoracle)
Hi Heoracle,

It is clearly mentioned in the readme file that for differential signal clk/clk# the terminator must be added externally.

You can extract this net to linesim and the you can add the termination.

Hope this will solve your problem

Regards,
Harish D

Readme.jpg 278.8 KB
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2. Re: How to use .ebd model to simulate the DDR3?

weston_beal Jul 19, 2012 11:20 AM (in response to heoracle)
There is an easy solution if you make one assumption. The termination resistors connect to a capacitor on the voltage side. Assume that the average voltage on the capacitor settles to VDD/2. This is a pretty good assumption because there is always one driver pulling up to VDD while the other pulls down to 0V. Then you can change the IBIS file, resistor_diff.ibs (attached) to have pullup resistors to VDD/2. With that little change, the complete net is included in the EBD and its associated IBIS files.

Weston

resistor_diff.ibs.zip 761 bytes
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