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1. Re: How to use .ebd model to simulate the DDR3?
d.harish Jul 16, 2012 5:29 AM (in response to heoracle)Hi Heoracle,
It is clearly mentioned in the readme file that for differential signal clk/clk# the terminator must be added externally.
You can extract this net to linesim and the you can add the termination.
Hope this will solve your problem
Regards,
Harish D
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Readme.jpg 278.8 KB
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2. Re: How to use .ebd model to simulate the DDR3?
weston_beal Jul 19, 2012 11:20 AM (in response to heoracle)There is an easy solution if you make one assumption. The termination resistors connect to a capacitor on the voltage side. Assume that the average voltage on the capacitor settles to VDD/2. This is a pretty good assumption because there is always one driver pulling up to VDD while the other pulls down to 0V. Then you can change the IBIS file, resistor_diff.ibs (attached) to have pullup resistors to VDD/2. With that little change, the complete net is included in the EBD and its associated IBIS files.
Weston
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resistor_diff.ibs.zip 761 bytes
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