It is an odd message; at least it is only a warning. As you only have a two layer board with no inner layers I'm not sure why it is concerned about losing inner layer information. Maybe there is an antipad defined for the inner layers or something? Maybe it is a bug? Did you try an ASCII export to see if anything extra shows up for the inner layers?
Yes I tried an ascii out and back in only to have same warning on 356 output.
I did think of possible pad stack defined diff on this one but no.
Top, inner & Bot along with top solder & bot solder are defined and that is all again a thru hole part.
All the other thru hole parts are same too?
I just love when this kind of stuff happens, brings into question the integrity of system/design in my mind even though only a warning.