AnsweredAssumed Answered

Transistors Floating in Calibre View

Question asked by nds123 on Sep 20, 2015
Latest reply on Oct 15, 2015 by karen_chow



I am working on a layout and am encountering a strange problem with extraction. I have passed LVS checks in LVS and PEX. My PEX run finishes without errors or warnings, but within the calibre view schematic,the transistors are floating. I am not sure if this is a problem related to the the PDK (TSMC) or if I have some setting incorrect.


I am hoping someone might have a solution to this problem.