I'm a newbie on Hperlynx SI. When I run the decoupling cap analysis, I have an issue below:
Follow above picture, I need to merge +0V9_CPU_OUT and +0V9_CPU to get whole decoupling capacitors on 0V9 power.
If I chose only +0V9_CPU and GND, I will miss the caps which are connected to +0V9_CPU_OUT.
How to merge two nets before run decoupling cap analysis ?