AnsweredAssumed Answered

How to verify the worst signal which re-timer can handle ?

Question asked by hungreohd on Nov 15, 2016

Hi all,

I need to verify the application which is used DS110DF111 re-timer. The detail is below:

The connection between CPU's XFI (TX) and DS110DF111 re-timer (RX)

CPU's XFI (TX) ==>Transmission line on PCB==> SlimSAS connector ==>SlimSAS Cable (350mm)==> SlimSAS connector ==> Transmission line on PCB ==> DS110DF111 (RX).

To verify that re-timer can handle above design, I had done below:

I export the transmission line to free-form on Hyperlynx, connect to S-parameter model of SlimSAS connector and cable to extract S-parameter of the whole channel which is described above. And then, I read the insertion loss and return loss to determine that re-timer can handle the signal on the whole channel.

Is this method correct ? If not, please help to show the other method? IBIS-AMI analysis can help in this design ?

Thanks all.

Outcomes