1 Reply Latest reply on Mar 20, 2017 9:05 AM by samantha_lizak

    Modifying the resistivity of M1 layer




      I am working with IBM PDK 65nm 10lpe process. We are taping out a chip that will use Al instead of Cu as M1. Accordingly, the resistivity will change. Any ideas how I can modify the resistivity of a layer so that it extraxts correctly?



        • 1. Re: Modifying the resistivity of M1 layer

          Hi Sherif-


          The best way is to ask the foundry for a PDK that includes the rules for an aluminum-M1 process instead of copper.  65nm isn't too bad, but the smaller you go the more important it is to get rules developed from process qualifications rather than theory.


          The other ways to do it depend on which Calibre version you are using.  In very old versions, there was an SVRF statement, RESISTANCE SHEET, that anyone could use. (If you have a copy of "SVRF Capacitance and Resistance Statements - Concepts and Usage" (xrc_cap_resist_gd.pdf) in your docs directory, your version of Calibre is old enough.)  In middling-old versions, you would need to modify the foundry-provided technology rules.  In current versions, because of the problems overconfident engineers were causing themselves and the foundries, those rules are generally encrypted.  Short of regenerating them from scratch with xCalibrate you cannot change the resistance value (to the best of my knowledge; someone else may know a workaround).  So -- learn from the headaches of others -- ask the foundry for a rule file for the manufacturing process you'll be using.  They must have some technology information around, or you wouldn't be able to specify an atypical material for M1.


          Hope this helps-