I am trying to use Hyperlynx PI (ver. 9.2) to do decoupling analysis for Xilinx-Kintex7 fpgas. The user guides of these FPGAs explicitly mention that these FPGAs have enough on-package decoupling capacitors that we don't need to add any further ceramic capacitors on PCB to bring down the impedance for mid - high frequencies. Kintex-7 even provides the values of these on-package decaps (C, ESL, and ESR).
How can I feed these inputs into Hyperlynx PI while doing decoupling analysis. I want to model these along with xilinx's recommended bulk capacitor and VRM model to check the impedance profile. In addition, how can we input the package inductance of these FPGAs?
Hi Chandan - thanks for your post. I am going to move it to the Hyperlynx community where it will receive greater visibility by other Hyperlynx users. Where you have posted it is for general community questions and suggestions.