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FPGAs Package Capacitor Consideration during PI Analysis

Question asked by chandan_eldaas on May 6, 2018
Latest reply on May 22, 2018 by weston_beal


I am trying to use Hyperlynx PI (ver. 9.2) to do decoupling analysis for Xilinx-Kintex7 fpgas. The user guides of these FPGAs explicitly mention that these FPGAs have enough on-package decoupling capacitors that we don't need to add any further ceramic capacitors on PCB to bring down the impedance for mid - high frequencies. Kintex-7 even provides the values of these on-package decaps (C, ESL, and ESR).

How can I feed these inputs into Hyperlynx PI while doing decoupling analysis. I want to model these along with xilinx's recommended bulk capacitor and VRM model to check the impedance profile. In addition, how can we input the package inductance of these FPGAs?