2 Replies Latest reply on Jun 6, 2018 1:48 PM by MENTOR_BillT

    stacked vias


      I have been told that pads does not support stacked vias and that you can get false errors or have problems.  however, I was just told by support that essentially pads is useless when using stacked vias because you cannot trust the connection or clearance checks.  That even though it says all connections are made, PADS will not guarantee that this is correct, but even though your design passes it may still have no connects and if it does, pads doesn't care, because they are not working to solve the problem at this time.  CAN THIS BE TRUE?!!!!!!!  This makes pads useless for most of the designs we do at Advanced Designs Inc!!  Unless I hear otherwise, I'm assuming my pads software can never be used with a stacked via design, and that's about half of my designs, nowadays.  how about you?  Am I the the only one that finds this totally unacceptable?  The support person told me that there is no way to check or verify a design is completely connected.  She even said that if the IPC netlist passes, there could still be unknown disconnects.  Is this possible?!

        • 1. Re: stacked vias
          Marty Fouch

          We are working offline with pcb3 to provide a solution to his/her stacked via issues. We will post a summary of the resolution in this discussion thread the middle of next week.


          Best Regards,

          Marty Fouch

          PADS Support & Services Manager

          • 2. Re: stacked vias

            Here's the essence of a phone call we had with pcb3 last week:


            While we do not officially support stacked vias, the following methodology could be used in creating stacked via designs.

            Begin by selecting an SMD pin, and choosing the Add Via At SMD command from the pop-up menu. Once the via is placed, select it and set the proper blind via. Copy the existing via and paste as many additional copies of the via as you will need to complete the stacked set of vias, off to the side. Select each via, open its properties dialog and set the required partial via type. Check the box to set the via as 'Glued' as well.


            Once the set of vias have been defined, enable the modeless command "OS" for Object Snapping (confirm that "Pin/Via origin" is enabled in Tools > Options > Grids and Snap > Object Snap). Move each of the vias that were placed off to the side onto the position of the first via that was placed on the SMD pin. Click “OK” to the prompt "Glued via(s) detected. Proceed anyway?"



            • Do not set the "Stitching" via flag on the stacked vias as it can create false connectivity errors.
            • Creation of separate drill drawing documents in CAM for stacked vias has a limitation which is described in knowledge base article MG581817 https://support.mentor.com/knowledge-base/MG581817.
            • If all electrical layers are included in a single drill drawing CAM document there may be a  discrepancy in the total number of partial vias in the drill chart as compared to the NC Drill file's report.  The NC Drill file contains the correct drill quantity.
            • If you use an IPC netlist to check your design be sure to create an IPC-D-356A style netlist, not an IPC-D-356. The "356A" netlist format contains partial via start and end layer information that the "356" format does not.
            • If you are deleting any vias in your design and you receive the prompt "Delete all orphaned vias?", be sure to click the "No" button to avoid the stacked vias from being removed.
            • If your design includes split planes and you have enabled the option to “Remove unused pads” in Tools > Options > Split/Mixed Plane, be sure to also enable the setting “Preserve via pads on start and end layers”. Otherwise, the missing pads on the start/end layers of your partial vias can create connectivity errors.