The via padstacks do not care what size the soldermask pads in them are. There is no such thing as reduced or not reduced. It either has a soldermask pad or it doesn't, and that pad has a size.
The only way to differentiate them is by the actual size. I suppose you could compare the size of the soldermask pad to the conductorlayer pad, then make some determination based on that. but there is no intrinsic property or attribute of a pad such as 'reduced' or 'not reduced'.