1 Reply Latest reply on Nov 12, 2018 9:04 AM by horror-vacui

    Calibre LVS: Debugging cross-coupled errors

    horror-vacui

      Hi Everyone,

       

      I have a strange LVS error, what I am debugging for about 4 hours at least and it makes no sense to me. I am running out of ideas. This makes me believe that there is a better debug procedure than the one I am following.

       

      I have a "cross-connect error" where the drains of two transistors are swapped on my top layout according to Calibre. The cell where the devices and all the interconnection in question reside is LVS clean. The nets in question are not connecting to any pins. I have four such cells on my top cell, but I got the error only for one of the placed instances. On the schematic, I used vector format, so I am sure that only the input and outputs are different. I checked my top layout and there is no metal on the higher hierarchy level which could cause any disturbance in net recognition. I have looked at the layout, highlighted and followed the wiring of questionable nets, searching for any possible interaction with other metals, but I have found none. The error and the number of violations are the same if I run flat instead of a hierarchical check. I turned an all LVS report options, but it only let me know, that I should swap the two outputs.

       

      If you have any idea how could I debug it better, please let me know!

       

      Regards,

      Zoltan

       

      PS: I am using Calibre for 10+ years, but I never had such a stubborn violation.

       

      Excerpt from the LVS report:

      2Net 248                                               XBUF<2>/XAMP/g_buf
         --- 5 Connections On This Net ---                     --- 5 Connections On This Net ---
         --------------------------                            --------------------------

       

         --- Incorrect Devices On This Net ---

       

         M7876(61.087,-344.008) (SL)  ME(egslvtnfet)           XBUF<2>/XAMP/XN2/MN0  ME(egslvtnfet)
           d: 248                                                ** XBUF<2>/XAMP/g_buf **
           ** 235 **                                             d: XBUF<2>/XAMP/pgb

       

         M7850(58.227,-344.008) (SL)  ME(egslvtnfet)           XBUF<2>/XAMP/XN3/MN0  ME(egslvtnfet)
           d: 235                                                ** XBUF<2>/XAMP/pgb **
           ** 248 **                                             d: XBUF<2>/XAMP/g_buf

       

       

        • 1. Re: Calibre LVS: Debugging cross-coupled errors
          horror-vacui

          I've figured it out. I got a symmetrical circuit, with inputs at the middle next to each other. On the top layout my cell was flipped and the two inputs has been switched. The flagged devices were in a later stage of the circuit. They were the first point of asymmetry in the circuit. What wonders me why didn't the LVS reported a wrong pin? I would have expected a net mismatch on the input port already.