I'm using Mentor's DXDesigner, Expedition PCB and HyperLynx for a high speed amplifier project which I'm doing for my Msc.
The amplifier is to designed with a bandwith of 0,5-1 GHz which leaves it sensitive to parasitic capacitance in the feedback loop, therefore I would like to be able to extract parasitic capacitance etc. from the PCB layout into my simulation model to check for circuit stability.
I have done this with IC Designer, but can't see that it's possible with my current tools. Can this be done? How, or do I need additional tools?