2 Replies Latest reply on Apr 11, 2010 5:16 AM by Govind_kulkarni

    Caliber LVS extracted netlist

    Govind_kulkarni

      Hi,

           I am generating the layout-extracted netlist by using the below command:

       

        calibre -cb -lvs -nl <rulefile_name>

       

      Its generating the layout netlist, but for one of the MOS its swapping the net oder swapped.

       

      Eg:

      netlist from the schematic (cdl):

      MOS_HVT  D G S B

       

      Layout generated/extracted netlist:

      MOS_HVT  G D S B

       

      Its checking the layout connectivity properly (we made intentional error it was reporting as a error).

       

      Can you please suggest me with what option this issue can be resolved or tel me which part of the ruledeck might have issue.