2 Replies Latest reply on Oct 20, 2010 1:19 PM by kirk.fabbri

    DDR Batch Simulation speed

    kirk.fabbri

      I am running HyperLynx 8.1 on Windows 7.  It is a 2 chip 32 bit DDR2 -400 design.  The simulation seems to be taking forever to run, much faster than other similar designs.

       

      Has anyone experienced slow simulation times?  I am using a brand new laptop with the i5 CPU (M 520 @ 2.40 GHz) and 8 GB or Ram.  The IBIS models and DDR timing models are being called from our common library on a network.  The hyp file and ref file are stored localy on my hard drive.

       

      Any suggestions why this is so slow?

       

      Kirk

        • 1. Re: DDR Batch Simulation speed
          Steve_McKinney

          My first guess is that you've probably got crosstalk turned on.  Additionally, the diff pair routing can take a bit of time to compute because we do a fairly exhaustive breakdown of the routed traces to make sure we have enough granularity in the simulation timestep so we don't miss any impedance discontinuities.  This can slow the simulation down as well.  If you don't have crosstalk turned on and it's still slow, try removing the strobe-to-clock skew measurement and see if that speeds it up at all.

           

          -Steve

          • 2. Re: DDR Batch Simulation speed
            kirk.fabbri

            I do have crosstalk on for the simulations, but it has never caused a problem in the past.  In this particular design the Strobes are single ended so the only diff pair is the CLK.