3 Replies Latest reply on Oct 4, 2011 5:00 PM by ayuekanbe_atagabe

    DDRx batch simulation error

    atoma

      Hi,

       

      I am using Hyperlynx 8.0 to run some post-layout DDR3 simulation.

       

      I have two board files to simulate with, both of which are translated from .pcb to .hyp.

       

      I can run the simulation with the first board with no problem, but i will get this error message with the other every time the simulation goes to 30%:

       

      ----------------------

      FATAL ERROR

       

      LINE 5431: C:\views\mholley_HL8.0_2\hyp_src\bsw\P2s.cpp

      ----------------------

       

      I don't even see a folder named "views" in my C drive. I don't know how am I going to troubleshoot this error without being able to locate this file?

       

      And any ideas of what might be the cause of this error?

       

      I appreciate it

        • 1. Re: DDRx batch simulation error
          ayuekanbe_atagabe

          Hello Atoma,

           

          Try the following:

          1)Delete all files except the 2 hyp files

          2)Open each file in a txt editor and make sure that each of them was translated using the SIMPLE mode

          3)Open each hyp file in HyperLynx and verify stackup(Top and Bottom must be signal layers), assign models using ref file only and save the designs individually

          4)Open multiboard and create a new multiboard system using simple connector.

          4a)Run DDR simulations again(you can try turning crosstalk off)

           

          5)If the crash still occurs I recommend you open a service request via supportnet.  Go to: http://supportnet.mentor.com/overview/index.cfm

          6)Login with your supportnet login

          7)Click on Service Request Tab and search

          8)Then open your Service Request if you can't find an answer.  Thanks

          • 2. Re: DDRx batch simulation error
            atoma

            Thanks for your reply.

             

            I'm fairly new to hyperlynx, so i'm not sure if I get everything you described here:

             

            2)Open each file in a txt editor and make sure that each of them was translated using the SIMPLE mode

             

               i looked at the files and the header all says

             

            {VERSION=2.10  Written by HyperLynx Accel-EDA translator V8.1 Build 43}

            {UNITS=ENGLISH WEIGHT}

             

               so where can i find out under which mode they are translated?

             

            3)Open each hyp file in HyperLynx and verify stackup(Top and Bottom must  be signal layers), assign models using ref file only and save the  designs individually

             

               top and bottom are signal layers. but where do I assign models? are you talking about in the wizard itself where you select models for the controller and DRAM? i only have the .ibs files for the model if that's what you are referring to.

             

             

            Thanks again

            • 3. Re: DDRx batch simulation error
              ayuekanbe_atagabe

              2)Open each file in a txt editor and make sure that each of them was translated using the SIMPLE mode

               

                 i looked at the files and the header all says

               

              {VERSION=2.10  Written by HyperLynx Accel-EDA translator V8.1 Build 43}

              {UNITS=ENGLISH WEIGHT}

               

                 so where can i find out under which mode they are translated?

               

              >>Ignore this part.  Accel-EDA does not support Detailed PI mode so this should not be an issue.

               

              3)Open each hyp file in HyperLynx and verify stackup(Top and Bottom must  be signal layers), assign models using ref file only and save the  designs individually

               

                 top and bottom are signal layers. but where do I assign models? are you talking about in the wizard itself where you select models for the controller and DRAM? i only have the .ibs files for the model if that's what you are referring to.

               

              >>Models> Assign Models by Reference Designator(.REF FILE).  You can assign IBIS models here.  There could be other issues but to investigate further you need to open a service request and get the design to a Mentor CAE so that we can determine the cause of the crash.

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