There are post-layout co-sim and pre-layout co-sim. Due to the complexibility, it's not feasible to do a real SI-PI cosim. WeI don't see there is a real solution by now. However, It's feasible making Hyperlynx tool to support a pre-layout SI-PI cosim.
We known that in the pre-layout phase, designer really don't know to how well the placement of driver/receiver should be, how transition vias coupling to power/ground and to affects the signal quality, how much SSN may be produced. Designer hope have a SI-PI cosim tool to help them do tradeoffs, to see what is the maxium distance bewteen driver and receiver, how to put the power regulatorhether they need to add stiching vias and how many decaps needed to place for suppressing SSN etc. Taking an example of 8 bit simultanious swithing co-sim scene, We can make hyperlynx linesim to support designr put the driver/receiver,regulator,vias and bypass caps on the PDN editor, even they can add trace skeletons.