It sounds like you are at the point where the charge in the capacitors should be supplying power to the DDR and you are limited by the inductances of the capacitor interconnects and the plane inductance. At this point you should be trying to reduce the plane inductance as the plane charge is the prime contributor of power to the rise in the signals. In high speed circuits the caps are there to re-charge the plane not drive the chips.
Do a web search on Bruce Archambeault and read some of his papers bypassing and SI and PI.
Try reducing the laminate thickness between the power and return (ground) plane and /or increasing their size. The boards that I do usually are 1-3 ohms but they are not commercial designs. Still I would believe that you should try to reduce the 12 ohms by half.
For dynamic current of 1.65A@1.8V and maximum percentage ripple as 2%, The Ztarget should be less than 21.8 milliohm up to your switching frequency.
For Decap's effectness, you may check the model of decap to see what is it's resonant frequency , which is dertimed by the capacitance and ESL. Below it's resonant frequency, Capacitor is still capacitive. On the board, Cap's mouting inductance(also spatial inductance) further decreases it's resonant frequency, so normally you see decaps works below 200-300Mhz . For higher frequency, power/ground pair capacitance and on-pacakge-capacitance takes effect, finally on-die capacitance do.