We have used 8 DDR2 chips in unbuffered manner while in wizard I am not able to select PLL in unbuffered configuration.
This technote will give you some general guidelines on how to work with this bus.
The PLL is part of a buffered implementation, but since you said your bus in unbuffered, I assume you do not have a register. This makes the bus kind of a hybrid of unbuffered and registered. There is a utility in the HyperLynx installation directory that can help you with this. Look for DDRClkWizard.exe in the hyperlynx (or hyperlynx32 or hyperlynx64 depending on your installation) and run that. This utility helps you merge the PLL device into the controller device so they appear logically as one device. Then you can assign that merged device as the DDR controller in the DDR wizard.
Thanks for your support but I am not able to find the utility mentioned, I am usign Hyp.8.0.
Yes, that utility was developed later. You should create a service request on SupportNet to request a copy of the utility. Emailing the utility should work. Another method is to start with the default controller timing model, and use this application note to tell you how to change the numbers to match the behavior of your particular controller.
Thank you very much for your support........I will create the service request.
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