Electrical overstress (EOS) is responsible for the vast majority of device failures and product returns. The use of multiple voltages
increases the risk of EOS, so IC designers need to increase their diligence to ensure that thin-oxide digital transistors do not have
direct or indirect paths to high-voltage portions of the design.This video shows how users can check for Electrical overstress using Calibre
PERC and use Calibre RVE to debug the results and eliminate the source of EOS failures.