In addition to the texted shorts that are caught as part of the extraction process, there are non-texted shorts generated during the
comparison process. Non-texted shorts are actual connectivity issues that have been analyzed and found to be a short by the comparison
process. Once all of the texted shorts have been corrected, users can begin debugging these comparison errors, which can sometimes be tricky
to correct. In this video we will learn how to use Calibre RVE to quickly debug non-texted shorts. Overview: To help fix non-texted
shorts, users can use Calibre RVE to see a visual representation of the layout and source netlists used in the LVS run, and debug LVS
discrepancies by comparing the source and layout schematics side-by-side. These schematics are especially valuable to designers when
schematics are not otherwise available for debug (e.g., Verilog). Tools Used in the Video: Calibre DESIGNrev, Calibre LVS and Calibre RVE.